[][src]Struct cortex_m::peripheral::SCB

pub struct SCB { /* fields omitted */ }

System Control Block

Methods

impl SCB
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Returns the active exception number

impl SCB
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Enables I-Cache if currently disabled

Disables I-Cache if currently enabled

Returns whether the I-Cache is currently enabled

Invalidates I-Cache

Enables D-cache if currently disabled

Disables D-cache if currently enabled

Returns whether the D-Cache is currently enabled

Cleans D-cache

Cleans and invalidates D-cache

Invalidates D-cache by address

addr: the address to invalidate size: size of the memory block, in number of bytes

Invalidates cache starting from the lowest 32-byte aligned address represented by addr, in blocks of 32 bytes until at least size bytes have been invalidated.

Cleans D-cache by address

addr: the address to clean size: size of the memory block, in number of bytes

Cleans cache starting from the lowest 32-byte aligned address represented by addr, in blocks of 32 bytes until at least size bytes have been cleaned.

Cleans and invalidates D-cache by address

addr: the address to clean and invalidate size: size of the memory block, in number of bytes

Cleans and invalidates cache starting from the lowest 32-byte aligned address represented by addr, in blocks of 32 bytes until at least size bytes have been cleaned and invalidated.

impl SCB
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Set the SLEEPDEEP bit in the SCR register

Clear the SLEEPDEEP bit in the SCR register

impl SCB
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Initiate a system reset request to reset the MCU

impl SCB
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Set the PENDSVSET bit in the ICSR register which will pend the PendSV interrupt

Check if PENDSVSET bit in the ICSR register is set meaning PendSV interrupt is pending

Set the PENDSVCLR bit in the ICSR register which will clear a pending PendSV interrupt

Set the PENDSTCLR bit in the ICSR register which will clear a pending SysTick interrupt

Check if PENDSTSET bit in the ICSR register is set meaning SysTick interrupt is pending

Set the PENDSTCLR bit in the ICSR register which will clear a pending SysTick interrupt

impl SCB
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Returns the hardware priority of system_handler

NOTE: Hardware priority does not exactly match logical priority levels. See NVIC.get_priority for more details.

Sets the hardware priority of system_handler to prio

NOTE: Hardware priority does not exactly match logical priority levels. See NVIC.get_priority for more details.

On ARMv6-M, updating a system handler priority requires a read-modify-write operation. On ARMv7-M, the operation is performed in a single, atomic write operation.

Unsafety

Changing priority levels can break priority-based critical sections (see register::basepri) and compromise memory safety.

impl SCB
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Returns a pointer to the register block

Trait Implementations

impl Deref for SCB
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The resulting type after dereferencing.

Dereferences the value.

impl Send for SCB
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Auto Trait Implementations

impl !Sync for SCB

Blanket Implementations

impl<T, U> TryFrom for T where
    T: From<U>, 
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🔬 This is a nightly-only experimental API. (try_from)

The type returned in the event of a conversion error.

🔬 This is a nightly-only experimental API. (try_from)

Performs the conversion.

impl<T> From for T
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Performs the conversion.

impl<T, U> TryInto for T where
    U: TryFrom<T>, 
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🔬 This is a nightly-only experimental API. (try_from)

The type returned in the event of a conversion error.

🔬 This is a nightly-only experimental API. (try_from)

Performs the conversion.

impl<T, U> Into for T where
    U: From<T>, 
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Performs the conversion.

impl<T> Borrow for T where
    T: ?Sized
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Immutably borrows from an owned value. Read more

impl<T> BorrowMut for T where
    T: ?Sized
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Mutably borrows from an owned value. Read more

impl<T> Any for T where
    T: 'static + ?Sized
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🔬 This is a nightly-only experimental API. (get_type_id)

this method will likely be replaced by an associated static

Gets the TypeId of self. Read more