1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252
#[doc = r" Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - Clock control register"] pub cr: CR, #[doc = "0x04 - Internal clock sources calibration register"] pub icscr: ICSCR, #[doc = "0x08 - Clock configuration register"] pub cfgr: CFGR, #[doc = "0x0c - PLL configuration register"] pub pllcfgr: PLLCFGR, #[doc = "0x10 - PLLSAI1 configuration register"] pub pllsai1cfgr: PLLSAI1CFGR, #[doc = "0x14 - PLLSAI2 configuration register"] pub pllsai2cfgr: PLLSAI2CFGR, #[doc = "0x18 - Clock interrupt enable register"] pub cier: CIER, #[doc = "0x1c - Clock interrupt flag register"] pub cifr: CIFR, #[doc = "0x20 - Clock interrupt clear register"] pub cicr: CICR, _reserved0: [u8; 4usize], #[doc = "0x28 - AHB1 peripheral reset register"] pub ahb1rstr: AHB1RSTR, #[doc = "0x2c - AHB2 peripheral reset register"] pub ahb2rstr: AHB2RSTR, #[doc = "0x30 - AHB3 peripheral reset register"] pub ahb3rstr: AHB3RSTR, _reserved1: [u8; 4usize], #[doc = "0x38 - APB1 peripheral reset register 1"] pub apb1rstr1: APB1RSTR1, #[doc = "0x3c - APB1 peripheral reset register 2"] pub apb1rstr2: APB1RSTR2, #[doc = "0x40 - APB2 peripheral reset register"] pub apb2rstr: APB2RSTR, _reserved2: [u8; 4usize], #[doc = "0x48 - AHB1 peripheral clock enable register"] pub ahb1enr: AHB1ENR, #[doc = "0x4c - AHB2 peripheral clock enable register"] pub ahb2enr: AHB2ENR, #[doc = "0x50 - AHB3 peripheral clock enable register"] pub ahb3enr: AHB3ENR, _reserved3: [u8; 4usize], #[doc = "0x58 - APB1ENR1"] pub apb1enr1: APB1ENR1, #[doc = "0x5c - APB1 peripheral clock enable register 2"] pub apb1enr2: APB1ENR2, #[doc = "0x60 - APB2ENR"] pub apb2enr: APB2ENR, _reserved4: [u8; 4usize], #[doc = "0x68 - AHB1 peripheral clocks enable in Sleep and Stop modes register"] pub ahb1smenr: AHB1SMENR, #[doc = "0x6c - AHB2 peripheral clocks enable in Sleep and Stop modes register"] pub ahb2smenr: AHB2SMENR, #[doc = "0x70 - AHB3 peripheral clocks enable in Sleep and Stop modes register"] pub ahb3smenr: AHB3SMENR, _reserved5: [u8; 4usize], #[doc = "0x78 - APB1SMENR1"] pub apb1smenr1: APB1SMENR1, #[doc = "0x7c - APB1 peripheral clocks enable in Sleep and Stop modes register 2"] pub apb1smenr2: APB1SMENR2, #[doc = "0x80 - APB2SMENR"] pub apb2smenr: APB2SMENR, _reserved6: [u8; 4usize], #[doc = "0x88 - CCIPR"] pub ccipr: CCIPR, _reserved7: [u8; 4usize], #[doc = "0x90 - BDCR"] pub bdcr: BDCR, #[doc = "0x94 - CSR"] pub csr: CSR, } #[doc = "Clock control register"] pub struct CR { register: ::vcell::VolatileCell<u32>, } #[doc = "Clock control register"] pub mod cr; #[doc = "Internal clock sources calibration register"] pub struct ICSCR { register: ::vcell::VolatileCell<u32>, } #[doc = "Internal clock sources calibration register"] pub mod icscr; #[doc = "Clock configuration register"] pub struct CFGR { register: ::vcell::VolatileCell<u32>, } #[doc = "Clock configuration register"] pub mod cfgr; #[doc = "PLL configuration register"] pub struct PLLCFGR { register: ::vcell::VolatileCell<u32>, } #[doc = "PLL configuration register"] pub mod pllcfgr; #[doc = "PLLSAI1 configuration register"] pub struct PLLSAI1CFGR { register: ::vcell::VolatileCell<u32>, } #[doc = "PLLSAI1 configuration register"] pub mod pllsai1cfgr; #[doc = "PLLSAI2 configuration register"] pub struct PLLSAI2CFGR { register: ::vcell::VolatileCell<u32>, } #[doc = "PLLSAI2 configuration register"] pub mod pllsai2cfgr; #[doc = "Clock interrupt enable register"] pub struct CIER { register: ::vcell::VolatileCell<u32>, } #[doc = "Clock interrupt enable register"] pub mod cier; #[doc = "Clock interrupt flag register"] pub struct CIFR { register: ::vcell::VolatileCell<u32>, } #[doc = "Clock interrupt flag register"] pub mod cifr; #[doc = "Clock interrupt clear register"] pub struct CICR { register: ::vcell::VolatileCell<u32>, } #[doc = "Clock interrupt clear register"] pub mod cicr; #[doc = "AHB1 peripheral reset register"] pub struct AHB1RSTR { register: ::vcell::VolatileCell<u32>, } #[doc = "AHB1 peripheral reset register"] pub mod ahb1rstr; #[doc = "AHB2 peripheral reset register"] pub struct AHB2RSTR { register: ::vcell::VolatileCell<u32>, } #[doc = "AHB2 peripheral reset register"] pub mod ahb2rstr; #[doc = "AHB3 peripheral reset register"] pub struct AHB3RSTR { register: ::vcell::VolatileCell<u32>, } #[doc = "AHB3 peripheral reset register"] pub mod ahb3rstr; #[doc = "APB1 peripheral reset register 1"] pub struct APB1RSTR1 { register: ::vcell::VolatileCell<u32>, } #[doc = "APB1 peripheral reset register 1"] pub mod apb1rstr1; #[doc = "APB1 peripheral reset register 2"] pub struct APB1RSTR2 { register: ::vcell::VolatileCell<u32>, } #[doc = "APB1 peripheral reset register 2"] pub mod apb1rstr2; #[doc = "APB2 peripheral reset register"] pub struct APB2RSTR { register: ::vcell::VolatileCell<u32>, } #[doc = "APB2 peripheral reset register"] pub mod apb2rstr; #[doc = "AHB1 peripheral clock enable register"] pub struct AHB1ENR { register: ::vcell::VolatileCell<u32>, } #[doc = "AHB1 peripheral clock enable register"] pub mod ahb1enr; #[doc = "AHB2 peripheral clock enable register"] pub struct AHB2ENR { register: ::vcell::VolatileCell<u32>, } #[doc = "AHB2 peripheral clock enable register"] pub mod ahb2enr; #[doc = "AHB3 peripheral clock enable register"] pub struct AHB3ENR { register: ::vcell::VolatileCell<u32>, } #[doc = "AHB3 peripheral clock enable register"] pub mod ahb3enr; #[doc = "APB1ENR1"] pub struct APB1ENR1 { register: ::vcell::VolatileCell<u32>, } #[doc = "APB1ENR1"] pub mod apb1enr1; #[doc = "APB1 peripheral clock enable register 2"] pub struct APB1ENR2 { register: ::vcell::VolatileCell<u32>, } #[doc = "APB1 peripheral clock enable register 2"] pub mod apb1enr2; #[doc = "APB2ENR"] pub struct APB2ENR { register: ::vcell::VolatileCell<u32>, } #[doc = "APB2ENR"] pub mod apb2enr; #[doc = "AHB1 peripheral clocks enable in Sleep and Stop modes register"] pub struct AHB1SMENR { register: ::vcell::VolatileCell<u32>, } #[doc = "AHB1 peripheral clocks enable in Sleep and Stop modes register"] pub mod ahb1smenr; #[doc = "AHB2 peripheral clocks enable in Sleep and Stop modes register"] pub struct AHB2SMENR { register: ::vcell::VolatileCell<u32>, } #[doc = "AHB2 peripheral clocks enable in Sleep and Stop modes register"] pub mod ahb2smenr; #[doc = "AHB3 peripheral clocks enable in Sleep and Stop modes register"] pub struct AHB3SMENR { register: ::vcell::VolatileCell<u32>, } #[doc = "AHB3 peripheral clocks enable in Sleep and Stop modes register"] pub mod ahb3smenr; #[doc = "APB1SMENR1"] pub struct APB1SMENR1 { register: ::vcell::VolatileCell<u32>, } #[doc = "APB1SMENR1"] pub mod apb1smenr1; #[doc = "APB1 peripheral clocks enable in Sleep and Stop modes register 2"] pub struct APB1SMENR2 { register: ::vcell::VolatileCell<u32>, } #[doc = "APB1 peripheral clocks enable in Sleep and Stop modes register 2"] pub mod apb1smenr2; #[doc = "APB2SMENR"] pub struct APB2SMENR { register: ::vcell::VolatileCell<u32>, } #[doc = "APB2SMENR"] pub mod apb2smenr; #[doc = "CCIPR"] pub struct CCIPR { register: ::vcell::VolatileCell<u32>, } #[doc = "CCIPR"] pub mod ccipr; #[doc = "BDCR"] pub struct BDCR { register: ::vcell::VolatileCell<u32>, } #[doc = "BDCR"] pub mod bdcr; #[doc = "CSR"] pub struct CSR { register: ::vcell::VolatileCell<u32>, } #[doc = "CSR"] pub mod csr;