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#[doc = r" Value read from the register"] pub struct R { bits: u32, } #[doc = r" Value to write to the register"] pub struct W { bits: u32, } impl super::OPAMP1_CSR { #[doc = r" Modifies the contents of the register"] #[inline] pub fn modify<F>(&self, f: F) where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, { let bits = self.register.get(); let r = R { bits: bits }; let mut w = W { bits: bits }; f(&r, &mut w); self.register.set(w.bits); } #[doc = r" Reads the contents of the register"] #[inline] pub fn read(&self) -> R { R { bits: self.register.get(), } } #[doc = r" Writes to the register"] #[inline] pub fn write<F>(&self, f: F) where F: FnOnce(&mut W) -> &mut W, { let mut w = W::reset_value(); f(&mut w); self.register.set(w.bits); } #[doc = r" Writes the reset value to the register"] #[inline] pub fn reset(&self) { self.write(|w| w) } } #[doc = r" Value of the field"] pub struct OPAENR { bits: bool, } impl OPAENR { #[doc = r" Value of the field as raw bits"] #[inline] pub fn bit(&self) -> bool { self.bits } #[doc = r" Returns `true` if the bit is clear (0)"] #[inline] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r" Returns `true` if the bit is set (1)"] #[inline] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r" Value of the field"] pub struct OPALPMR { bits: bool, } impl OPALPMR { #[doc = r" Value of the field as raw bits"] #[inline] pub fn bit(&self) -> bool { self.bits } #[doc = r" Returns `true` if the bit is clear (0)"] #[inline] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r" Returns `true` if the bit is set (1)"] #[inline] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r" Value of the field"] pub struct OPAMODER { bits: u8, } impl OPAMODER { #[doc = r" Value of the field as raw bits"] #[inline] pub fn bits(&self) -> u8 { self.bits } } #[doc = r" Value of the field"] pub struct PGA_GAINR { bits: u8, } impl PGA_GAINR { #[doc = r" Value of the field as raw bits"] #[inline] pub fn bits(&self) -> u8 { self.bits } } #[doc = r" Value of the field"] pub struct VM_SELR { bits: u8, } impl VM_SELR { #[doc = r" Value of the field as raw bits"] #[inline] pub fn bits(&self) -> u8 { self.bits } } #[doc = r" Value of the field"] pub struct VP_SELR { bits: bool, } impl VP_SELR { #[doc = r" Value of the field as raw bits"] #[inline] pub fn bit(&self) -> bool { self.bits } #[doc = r" Returns `true` if the bit is clear (0)"] #[inline] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r" Returns `true` if the bit is set (1)"] #[inline] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r" Value of the field"] pub struct CALONR { bits: bool, } impl CALONR { #[doc = r" Value of the field as raw bits"] #[inline] pub fn bit(&self) -> bool { self.bits } #[doc = r" Returns `true` if the bit is clear (0)"] #[inline] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r" Returns `true` if the bit is set (1)"] #[inline] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r" Value of the field"] pub struct CALSELR { bits: bool, } impl CALSELR { #[doc = r" Value of the field as raw bits"] #[inline] pub fn bit(&self) -> bool { self.bits } #[doc = r" Returns `true` if the bit is clear (0)"] #[inline] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r" Returns `true` if the bit is set (1)"] #[inline] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r" Value of the field"] pub struct USERTRIMR { bits: bool, } impl USERTRIMR { #[doc = r" Value of the field as raw bits"] #[inline] pub fn bit(&self) -> bool { self.bits } #[doc = r" Returns `true` if the bit is clear (0)"] #[inline] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r" Returns `true` if the bit is set (1)"] #[inline] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r" Value of the field"] pub struct CALOUTR { bits: bool, } impl CALOUTR { #[doc = r" Value of the field as raw bits"] #[inline] pub fn bit(&self) -> bool { self.bits } #[doc = r" Returns `true` if the bit is clear (0)"] #[inline] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r" Returns `true` if the bit is set (1)"] #[inline] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r" Value of the field"] pub struct OPA_RANGER { bits: bool, } impl OPA_RANGER { #[doc = r" Value of the field as raw bits"] #[inline] pub fn bit(&self) -> bool { self.bits } #[doc = r" Returns `true` if the bit is clear (0)"] #[inline] pub fn bit_is_clear(&self) -> bool { !self.bit() } #[doc = r" Returns `true` if the bit is set (1)"] #[inline] pub fn bit_is_set(&self) -> bool { self.bit() } } #[doc = r" Proxy"] pub struct _OPAENW<'a> { w: &'a mut W, } impl<'a> _OPAENW<'a> { #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 0; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } #[doc = r" Proxy"] pub struct _OPALPMW<'a> { w: &'a mut W, } impl<'a> _OPALPMW<'a> { #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 1; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } #[doc = r" Proxy"] pub struct _OPAMODEW<'a> { w: &'a mut W, } impl<'a> _OPAMODEW<'a> { #[doc = r" Writes raw bits to the field"] #[inline] pub unsafe fn bits(self, value: u8) -> &'a mut W { const MASK: u8 = 3; const OFFSET: u8 = 2; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } #[doc = r" Proxy"] pub struct _PGA_GAINW<'a> { w: &'a mut W, } impl<'a> _PGA_GAINW<'a> { #[doc = r" Writes raw bits to the field"] #[inline] pub unsafe fn bits(self, value: u8) -> &'a mut W { const MASK: u8 = 3; const OFFSET: u8 = 4; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } #[doc = r" Proxy"] pub struct _VM_SELW<'a> { w: &'a mut W, } impl<'a> _VM_SELW<'a> { #[doc = r" Writes raw bits to the field"] #[inline] pub unsafe fn bits(self, value: u8) -> &'a mut W { const MASK: u8 = 3; const OFFSET: u8 = 8; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } #[doc = r" Proxy"] pub struct _VP_SELW<'a> { w: &'a mut W, } impl<'a> _VP_SELW<'a> { #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 10; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } #[doc = r" Proxy"] pub struct _CALONW<'a> { w: &'a mut W, } impl<'a> _CALONW<'a> { #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 12; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } #[doc = r" Proxy"] pub struct _CALSELW<'a> { w: &'a mut W, } impl<'a> _CALSELW<'a> { #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 13; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } #[doc = r" Proxy"] pub struct _USERTRIMW<'a> { w: &'a mut W, } impl<'a> _USERTRIMW<'a> { #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 14; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } #[doc = r" Proxy"] pub struct _CALOUTW<'a> { w: &'a mut W, } impl<'a> _CALOUTW<'a> { #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 15; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } #[doc = r" Proxy"] pub struct _OPA_RANGEW<'a> { w: &'a mut W, } impl<'a> _OPA_RANGEW<'a> { #[doc = r" Sets the field bit"] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r" Clears the field bit"] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r" Writes raw bits to the field"] #[inline] pub fn bit(self, value: bool) -> &'a mut W { const MASK: bool = true; const OFFSET: u8 = 31; self.w.bits &= !((MASK as u32) << OFFSET); self.w.bits |= ((value & MASK) as u32) << OFFSET; self.w } } impl R { #[doc = r" Value of the register as raw bits"] #[inline] pub fn bits(&self) -> u32 { self.bits } #[doc = "Bit 0 - Operational amplifier Enable"] #[inline] pub fn opaen(&self) -> OPAENR { let bits = { const MASK: bool = true; const OFFSET: u8 = 0; ((self.bits >> OFFSET) & MASK as u32) != 0 }; OPAENR { bits } } #[doc = "Bit 1 - Operational amplifier Low Power Mode"] #[inline] pub fn opalpm(&self) -> OPALPMR { let bits = { const MASK: bool = true; const OFFSET: u8 = 1; ((self.bits >> OFFSET) & MASK as u32) != 0 }; OPALPMR { bits } } #[doc = "Bits 2:3 - Operational amplifier PGA mode"] #[inline] pub fn opamode(&self) -> OPAMODER { let bits = { const MASK: u8 = 3; const OFFSET: u8 = 2; ((self.bits >> OFFSET) & MASK as u32) as u8 }; OPAMODER { bits } } #[doc = "Bits 4:5 - Operational amplifier Programmable amplifier gain value"] #[inline] pub fn pga_gain(&self) -> PGA_GAINR { let bits = { const MASK: u8 = 3; const OFFSET: u8 = 4; ((self.bits >> OFFSET) & MASK as u32) as u8 }; PGA_GAINR { bits } } #[doc = "Bits 8:9 - Inverting input selection"] #[inline] pub fn vm_sel(&self) -> VM_SELR { let bits = { const MASK: u8 = 3; const OFFSET: u8 = 8; ((self.bits >> OFFSET) & MASK as u32) as u8 }; VM_SELR { bits } } #[doc = "Bit 10 - Non inverted input selection"] #[inline] pub fn vp_sel(&self) -> VP_SELR { let bits = { const MASK: bool = true; const OFFSET: u8 = 10; ((self.bits >> OFFSET) & MASK as u32) != 0 }; VP_SELR { bits } } #[doc = "Bit 12 - Calibration mode enabled"] #[inline] pub fn calon(&self) -> CALONR { let bits = { const MASK: bool = true; const OFFSET: u8 = 12; ((self.bits >> OFFSET) & MASK as u32) != 0 }; CALONR { bits } } #[doc = "Bit 13 - Calibration selection"] #[inline] pub fn calsel(&self) -> CALSELR { let bits = { const MASK: bool = true; const OFFSET: u8 = 13; ((self.bits >> OFFSET) & MASK as u32) != 0 }; CALSELR { bits } } #[doc = "Bit 14 - allows to switch from \u{c3}\u{192}\u{c6}\u{2019}\u{c3}\u{2020}\u{e2}\u{20ac}\u{2122}\u{c3}\u{192}\u{e2}\u{20ac}\u{161}\u{c3}\u{201a}\u{c2}\u{a2}\u{c3}\u{192}\u{c6}\u{2019}\u{c3}\u{201a}\u{c2}\u{a2}\u{c3}\u{192}\u{c2}\u{a2}\u{c3}\u{a2}\u{e2}\u{20ac}\u{161}\u{c2}\u{ac}\u{c3}\u{2026}\u{c2}\u{a1}\u{c3}\u{192}\u{e2}\u{20ac}\u{161}\u{c3}\u{201a}\u{c2}\u{ac}\u{c3}\u{192}\u{c6}\u{2019}\u{c3}\u{a2}\u{e2}\u{201a}\u{ac}\u{c2}\u{b9}\u{c3}\u{192}\u{e2}\u{20ac}\u{a6}\u{c3}\u{a2}\u{e2}\u{201a}\u{ac}\u{c5}\u{201c}factory\u{c3}\u{192}\u{c6}\u{2019}\u{c3}\u{2020}\u{e2}\u{20ac}\u{2122}\u{c3}\u{192}\u{e2}\u{20ac}\u{161}\u{c3}\u{201a}\u{c2}\u{a2}\u{c3}\u{192}\u{c6}\u{2019}\u{c3}\u{201a}\u{c2}\u{a2}\u{c3}\u{192}\u{c2}\u{a2}\u{c3}\u{a2}\u{e2}\u{20ac}\u{161}\u{c2}\u{ac}\u{c3}\u{2026}\u{c2}\u{a1}\u{c3}\u{192}\u{e2}\u{20ac}\u{161}\u{c3}\u{201a}\u{c2}\u{ac}\u{c3}\u{192}\u{c6}\u{2019}\u{c3}\u{201a}\u{c2}\u{a2}\u{c3}\u{192}\u{c2}\u{a2}\u{c3}\u{a2}\u{e2}\u{20ac}\u{161}\u{c2}\u{ac}\u{c3}\u{2026}\u{c2}\u{be}\u{c3}\u{192}\u{e2}\u{20ac}\u{161}\u{c3}\u{201a}\u{c2}\u{a2} AOP offset trimmed values to AOP offset \u{c3}\u{192}\u{c6}\u{2019}\u{c3}\u{2020}\u{e2}\u{20ac}\u{2122}\u{c3}\u{192}\u{e2}\u{20ac}\u{161}\u{c3}\u{201a}\u{c2}\u{a2}\u{c3}\u{192}\u{c6}\u{2019}\u{c3}\u{201a}\u{c2}\u{a2}\u{c3}\u{192}\u{c2}\u{a2}\u{c3}\u{a2}\u{e2}\u{20ac}\u{161}\u{c2}\u{ac}\u{c3}\u{2026}\u{c2}\u{a1}\u{c3}\u{192}\u{e2}\u{20ac}\u{161}\u{c3}\u{201a}\u{c2}\u{ac}\u{c3}\u{192}\u{c6}\u{2019}\u{c3}\u{a2}\u{e2}\u{201a}\u{ac}\u{c2}\u{b9}\u{c3}\u{192}\u{e2}\u{20ac}\u{a6}\u{c3}\u{a2}\u{e2}\u{201a}\u{ac}\u{c5}\u{201c}user\u{c3}\u{192}\u{c6}\u{2019}\u{c3}\u{2020}\u{e2}\u{20ac}\u{2122}\u{c3}\u{192}\u{e2}\u{20ac}\u{161}\u{c3}\u{201a}\u{c2}\u{a2}\u{c3}\u{192}\u{c6}\u{2019}\u{c3}\u{201a}\u{c2}\u{a2}\u{c3}\u{192}\u{c2}\u{a2}\u{c3}\u{a2}\u{e2}\u{20ac}\u{161}\u{c2}\u{ac}\u{c3}\u{2026}\u{c2}\u{a1}\u{c3}\u{192}\u{e2}\u{20ac}\u{161}\u{c3}\u{201a}\u{c2}\u{ac}\u{c3}\u{192}\u{c6}\u{2019}\u{c3}\u{201a}\u{c2}\u{a2}\u{c3}\u{192}\u{c2}\u{a2}\u{c3}\u{a2}\u{e2}\u{20ac}\u{161}\u{c2}\u{ac}\u{c3}\u{2026}\u{c2}\u{be}\u{c3}\u{192}\u{e2}\u{20ac}\u{161}\u{c3}\u{201a}\u{c2}\u{a2}"] #[inline] pub fn usertrim(&self) -> USERTRIMR { let bits = { const MASK: bool = true; const OFFSET: u8 = 14; ((self.bits >> OFFSET) & MASK as u32) != 0 }; USERTRIMR { bits } } #[doc = "Bit 15 - Operational amplifier calibration output"] #[inline] pub fn calout(&self) -> CALOUTR { let bits = { const MASK: bool = true; const OFFSET: u8 = 15; ((self.bits >> OFFSET) & MASK as u32) != 0 }; CALOUTR { bits } } #[doc = "Bit 31 - Operational amplifier power supply range for stability"] #[inline] pub fn opa_range(&self) -> OPA_RANGER { let bits = { const MASK: bool = true; const OFFSET: u8 = 31; ((self.bits >> OFFSET) & MASK as u32) != 0 }; OPA_RANGER { bits } } } impl W { #[doc = r" Reset value of the register"] #[inline] pub fn reset_value() -> W { W { bits: 0 } } #[doc = r" Writes raw bits to the register"] #[inline] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.bits = bits; self } #[doc = "Bit 0 - Operational amplifier Enable"] #[inline] pub fn opaen(&mut self) -> _OPAENW { _OPAENW { w: self } } #[doc = "Bit 1 - Operational amplifier Low Power Mode"] #[inline] pub fn opalpm(&mut self) -> _OPALPMW { _OPALPMW { w: self } } #[doc = "Bits 2:3 - Operational amplifier PGA mode"] #[inline] pub fn opamode(&mut self) -> _OPAMODEW { _OPAMODEW { w: self } } #[doc = "Bits 4:5 - Operational amplifier Programmable amplifier gain value"] #[inline] pub fn pga_gain(&mut self) -> _PGA_GAINW { _PGA_GAINW { w: self } } #[doc = "Bits 8:9 - Inverting input selection"] #[inline] pub fn vm_sel(&mut self) -> _VM_SELW { _VM_SELW { w: self } } #[doc = "Bit 10 - Non inverted input selection"] #[inline] pub fn vp_sel(&mut self) -> _VP_SELW { _VP_SELW { w: self } } #[doc = "Bit 12 - Calibration mode enabled"] #[inline] pub fn calon(&mut self) -> _CALONW { _CALONW { w: self } } #[doc = "Bit 13 - Calibration selection"] #[inline] pub fn calsel(&mut self) -> _CALSELW { _CALSELW { w: self } } #[doc = "Bit 14 - allows to switch from \u{c3}\u{192}\u{c6}\u{2019}\u{c3}\u{2020}\u{e2}\u{20ac}\u{2122}\u{c3}\u{192}\u{e2}\u{20ac}\u{161}\u{c3}\u{201a}\u{c2}\u{a2}\u{c3}\u{192}\u{c6}\u{2019}\u{c3}\u{201a}\u{c2}\u{a2}\u{c3}\u{192}\u{c2}\u{a2}\u{c3}\u{a2}\u{e2}\u{20ac}\u{161}\u{c2}\u{ac}\u{c3}\u{2026}\u{c2}\u{a1}\u{c3}\u{192}\u{e2}\u{20ac}\u{161}\u{c3}\u{201a}\u{c2}\u{ac}\u{c3}\u{192}\u{c6}\u{2019}\u{c3}\u{a2}\u{e2}\u{201a}\u{ac}\u{c2}\u{b9}\u{c3}\u{192}\u{e2}\u{20ac}\u{a6}\u{c3}\u{a2}\u{e2}\u{201a}\u{ac}\u{c5}\u{201c}factory\u{c3}\u{192}\u{c6}\u{2019}\u{c3}\u{2020}\u{e2}\u{20ac}\u{2122}\u{c3}\u{192}\u{e2}\u{20ac}\u{161}\u{c3}\u{201a}\u{c2}\u{a2}\u{c3}\u{192}\u{c6}\u{2019}\u{c3}\u{201a}\u{c2}\u{a2}\u{c3}\u{192}\u{c2}\u{a2}\u{c3}\u{a2}\u{e2}\u{20ac}\u{161}\u{c2}\u{ac}\u{c3}\u{2026}\u{c2}\u{a1}\u{c3}\u{192}\u{e2}\u{20ac}\u{161}\u{c3}\u{201a}\u{c2}\u{ac}\u{c3}\u{192}\u{c6}\u{2019}\u{c3}\u{201a}\u{c2}\u{a2}\u{c3}\u{192}\u{c2}\u{a2}\u{c3}\u{a2}\u{e2}\u{20ac}\u{161}\u{c2}\u{ac}\u{c3}\u{2026}\u{c2}\u{be}\u{c3}\u{192}\u{e2}\u{20ac}\u{161}\u{c3}\u{201a}\u{c2}\u{a2} AOP offset trimmed values to AOP offset \u{c3}\u{192}\u{c6}\u{2019}\u{c3}\u{2020}\u{e2}\u{20ac}\u{2122}\u{c3}\u{192}\u{e2}\u{20ac}\u{161}\u{c3}\u{201a}\u{c2}\u{a2}\u{c3}\u{192}\u{c6}\u{2019}\u{c3}\u{201a}\u{c2}\u{a2}\u{c3}\u{192}\u{c2}\u{a2}\u{c3}\u{a2}\u{e2}\u{20ac}\u{161}\u{c2}\u{ac}\u{c3}\u{2026}\u{c2}\u{a1}\u{c3}\u{192}\u{e2}\u{20ac}\u{161}\u{c3}\u{201a}\u{c2}\u{ac}\u{c3}\u{192}\u{c6}\u{2019}\u{c3}\u{a2}\u{e2}\u{201a}\u{ac}\u{c2}\u{b9}\u{c3}\u{192}\u{e2}\u{20ac}\u{a6}\u{c3}\u{a2}\u{e2}\u{201a}\u{ac}\u{c5}\u{201c}user\u{c3}\u{192}\u{c6}\u{2019}\u{c3}\u{2020}\u{e2}\u{20ac}\u{2122}\u{c3}\u{192}\u{e2}\u{20ac}\u{161}\u{c3}\u{201a}\u{c2}\u{a2}\u{c3}\u{192}\u{c6}\u{2019}\u{c3}\u{201a}\u{c2}\u{a2}\u{c3}\u{192}\u{c2}\u{a2}\u{c3}\u{a2}\u{e2}\u{20ac}\u{161}\u{c2}\u{ac}\u{c3}\u{2026}\u{c2}\u{a1}\u{c3}\u{192}\u{e2}\u{20ac}\u{161}\u{c3}\u{201a}\u{c2}\u{ac}\u{c3}\u{192}\u{c6}\u{2019}\u{c3}\u{201a}\u{c2}\u{a2}\u{c3}\u{192}\u{c2}\u{a2}\u{c3}\u{a2}\u{e2}\u{20ac}\u{161}\u{c2}\u{ac}\u{c3}\u{2026}\u{c2}\u{be}\u{c3}\u{192}\u{e2}\u{20ac}\u{161}\u{c3}\u{201a}\u{c2}\u{a2}"] #[inline] pub fn usertrim(&mut self) -> _USERTRIMW { _USERTRIMW { w: self } } #[doc = "Bit 15 - Operational amplifier calibration output"] #[inline] pub fn calout(&mut self) -> _CALOUTW { _CALOUTW { w: self } } #[doc = "Bit 31 - Operational amplifier power supply range for stability"] #[inline] pub fn opa_range(&mut self) -> _OPA_RANGEW { _OPA_RANGEW { w: self } } }